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Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM.

, , , , , и . Future Gener. Comput. Syst., (2021)

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Salvador Navarro Navarro

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Другие публикации лиц с тем же именем

Parallel Pipeline on Heterogeneous Multi-processing Architectures., , , , , и . TrustCom/BigDataSE/ISPA (3), стр. 166-171. IEEE, (2015)978-1-4673-7952-6.An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors., , , , и . IEEE Trans. Parallel Distributed Syst., 13 (3): 241-259 (2002)Lightweight asynchronous scheduling in heterogeneous reconfigurable systems., , , , , , и . J. Syst. Archit., (2022)Efficient heterogeneous matrix profile on a CPU + High Performance FPGA with integrated HBM., , , , , и . Future Gener. Comput. Syst., (2021)Towards a Software Transactional Memory for Heterogeneous CPU-GPU Processors., , , и . PARCO, том 32 из Advances in Parallel Computing, стр. 708-717. IOS Press, (2017)Load sharing based on popularity in distributed video on demand systems., , , и . ICME (1), стр. 5-8. IEEE Computer Society, (2002)Lightweight Hardware Transactional Memory for GPU Scratchpad Memory., , , , и . IEEE Trans. Computers, 67 (6): 816-829 (2018)A case study of different task implementations for multioutput stages in non-trivial parallel pipeline applications., , , , и . Parallel Comput., 40 (8): 374-393 (2014)Strategies for maximizing utilization on multi-CPU and multi-GPU heterogeneous architectures., , , и . J. Supercomput., 70 (2): 756-771 (2014)An Automatic Iteration/Data Distribution Method Based on Access Descriptors for DSMM., и . LCPC, том 1863 из Lecture Notes in Computer Science, стр. 133-148. Springer, (1999)