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Global Routing., и . Encyclopedia of Algorithms, (2016)On the Approximation Resiliency of Logic Locking and IC Camouflaging Schemes., , , , и . IEEE Trans. Inf. Forensics Secur., 14 (2): 347-359 (2019)Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (5): 726-739 (2015)Skew Management of NBTI Impacted Gated Clock Trees., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 32 (6): 918-927 (2013)Double Patterning Layout Decomposition for Simultaneous Conflict and Stitch Minimization., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (2): 185-196 (2010)MrDP: Multiple-Row Detailed Placement of Heterogeneous-Sized Cells for Advanced Nodes., , , , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (6): 1237-1250 (2018)Redundant Local-Loop Insertion for Unidirectional Routing., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (7): 1113-1125 (2017)Semisupervised Hotspot Detection With Self-Paced Multitask Learning., , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (7): 1511-1523 (2020)OSFA: A New Paradigm of Aging Aware Gate-Sizing for Power/Performance Optimizations Under Multiple Operating Conditions., , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (10): 1618-1629 (2016)Powernet: SOI Lateral Power Device Breakdown Prediction With Deep Neural Networks., , , , , , и . IEEE Access, (2020)