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Solid-State Disk with Double Data Rate DRAM Interface for High-Performance PCs.

, , , , , and . IEICE Trans. Inf. Syst., 92-D (4): 727-731 (2009)

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Performance and cache access time of SRAM-eDRAM hybrid caches considering wire delay., , and . ISQED, page 524-530. IEEE, (2013)A Split L2 Data Cache for Scalable Cc-numa Multiprocessors., , and . Journal of Circuits, Systems, and Computers, 14 (3): 605-618 (2005)Is the Complicated ECC Array Necessary for Data Caches?, , , and . CDES, page 137-139. CSREA Press, (2007)An energy-efficient task scheduler for mobile web browsing., , and . ICCE, page 188-189. IEEE, (2017)Fine-Grain Voltage Tuned Cache Architecture for Yield Management Under Process Variations., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (8): 1532-1536 (2012)An Adaptive Thermal Management Framework for Heterogeneous Multi-Core Processors., , , and . IEEE Trans. Computers, 69 (6): 894-906 (2020)A Survey on Recent OS-Level Energy Management Techniques for Mobile Processing Units., , and . IEEE Trans. Parallel Distributed Syst., 29 (10): 2388-2401 (2018)On-Demand Mobile CPU Cooling With Thin-Film Thermoelectric Array., , , and . IEEE Micro, 41 (4): 67-73 (2021)A High-Performance Processing-in-Memory Accelerator for Inline Data Deduplication., , , , and . ICCD, page 515-523. IEEE, (2019)Architecture/OS Support for Embedded Multi-core Systems., , and . Comput. J., 53 (8): 1134-1135 (2010)