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Disambiguation of "Guo, Jiun-In"

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Real-Time 3D Depth Generation for Stereoscopic Video Applications with Thread-Level Superscalar-Pipeline Parallelization.

, , , and . J. Signal Process. Syst., 72 (1): 17-33 (2013)

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Jia-Jiun Yan

Jiun-Hao Wang

Jiun-Shan Chen

Shann-Jiun Chang

Jiun-Hung Yu

 

Other publications of authors with the same name

Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism., , , , and . ASP-DAC, page 85-86. IEEE, (2011)Dynamic voltage domain assignment technique for low power performance manageable cell based design., , , and . ASP-DAC, page 359-360. IEEE, (2010)Recognizing Chinese Texts with 3D Convolutional Neural Network., , , and . ICIP, page 2120-2123. IEEE, (2019)A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths., , and . Journal of Circuits, Systems, and Computers, 11 (4): 405-428 (2002)A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC., , , , , , and . APCCAS, page 398-401. IEEE, (2006)A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism., and . VLSI-DAT, page 1-4. IEEE, (2012)A 3D hand tracking design for gesture control in complex environments., , and . VLSI-DAT, page 1-4. IEEE, (2015)Low compute complexity BU-based rate control algorithm for H.264/AVC encoder., and . APCCAS, page 564-567. IEEE, (2010)A low cost 2-D inverse discrete cosine transform design for image compression.. ISCAS (4), page 658-661. IEEE, (2001)A High Throughput Deblocking Filter Design Supporting Multiple Video Coding Standards., , and . ISCAS, page 2377-2380. IEEE, (2009)