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Disambiguation of "Masera, Guido"

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Reducing the memory for iteration-exchanged information and border future metrics in the HomePlug AV turbo decoder implementation.

, , , and . ISTC, page 180-184. IEEE, (2012)

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Bruno Remo Guidotti

Sauter Guido

Curt Guido

Isabella Guido

Luca Guido

 

Other publications of authors with the same name

Thermal Control for Crossbar-Based Input-Queued Switches., , , and . GLOBECOM, page 1-5. IEEE, (2010)Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures, and . CoRR, (2009)Flexible blocks for high throughput serially concatenated convolutional codes., and . ACM Great Lakes Symposium on VLSI, page 184-187. ACM, (2007)Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives., , and . PRIME, page 209-212. IEEE, (2023)A Multi-Kernel Multi-Code Polar Decoder Architecture., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (12): 4413-4422 (2018)Low-Complexity Video Compression Combining Adaptive Multifoveation and Reuse of High-Resolution Information., , , and . ICIP, page 3153-3156. IEEE, (2006)Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes., , , , , , and . CoRR, (2024)Rediscovering Logarithmic Diameter Topologies for Low Latency Network-on-Chip-Based Applications., , , and . PDP, page 418-423. IEEE Computer Society, (2014)A Parametrical Architecture for Reed-Solomon Decoders., and . Great Lakes Symposium on VLSI, page 81-. IEEE Computer Society, (1996)Approximate Arai DCT Architecture for HEVC., , , and . NGCAS, page 133-136. IEEE, (2017)