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Automated Code generation for Information Technology Tasks in YAML through Large Language Models., , , , , , , , , and 1 other author(s). CoRR, (2023)Intra-node high-performance computing network architecture with nanosecond-scale photonic switches Invited., , , , , and . JOCN, 12 (12): 367-377 (2020)FEC-Free 60-Gb/s Silicon Photonic Link Using SiGe-Driver ICs Hybrid-Integrated with Photonics-Enabled CMOS., , , , , , , , , and 1 other author(s). OFC, page 1-3. IEEE, (2018)System-Level Demonstration of a Dynamically Reconfigured Burst-Mode Link Using a Nanosecond Si-Photonic Switch., , , , , , and . OFC, page 1-3. IEEE, (2018)30Gbps optical link utilizing heterogeneously integrated III-V/Si photonics and CMOS circuits., , , , , , , , , and 3 other author(s). OFC, page 1-3. IEEE, (2014)A Nonblocking 4×4 Mach-Zehnder Switch with Integrated Gain and Nanosecond-Scale Reconfiguration Time., , , , , , , and . OFC, page 1-3. IEEE, (2019)Invited: Automated Code generation for Information Technology Tasks in YAML through Large Language Models., , , , , , , , , and 1 other author(s). DAC, page 1-4. IEEE, (2023)Driver-integrated 56-Gb/s segmented electrode silicon Mach Zehnder modulator using optical-domain equalization., , , , , , and . OFC, page 1-3. IEEE, (2017)Intra-node High-performance Computing Network Architecture with Fast Optical Switch Fabrics., , , , and . OECC/PSC, page 1-4. IEEE, (2022)Scalability of optical circuit switches using 2×2 Mach-Zehnder switches as a building block., , and . OFC, page 1-3. IEEE, (2016)