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ESPRESSO-SIGNATURE: a new exact minimizer for logic functions., , , and . IEEE Trans. Very Large Scale Integr. Syst., 1 (4): 432-440 (1993)Explicit and implicit algorithms for binate covering problems., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (7): 677-691 (1997)PLA-based regular structures and their synthesis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (6): 723-729 (2003)Theory of safe replacements for sequential circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (2): 249-265 (2001)Two-Level Minimization of Multivalued Functions with Large Offsets., , , and . IEEE Trans. Computers, 42 (11): 1325-1342 (1993)NSF Workshop on EDA: Past, Present, and Future (Part 1)., and . IEEE Des. Test Comput., 27 (2): 68-74 (2010)An Environment for Formal Verification Based on Symbolic Computations., and . Formal Methods Syst. Des., 6 (2): 191-216 (1995)Exact Required Time Analysis via False Path Detection., and . DAC, page 220-225. ACM Press, (1997)Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation., , and . DAC, page 173-176. IEEE Computer Society Press, (1992)Logic Synthesis for Programmable Gate Arrays., , , , and . DAC, page 620-625. IEEE Computer Society Press, (1990)