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An FPGA Architecture for Online Learning using the Tsetlin Machine., , , , , and . CoRR, (2023)Energy-frugal and Interpretable AI Hardware Design using Learning Automata., , , , and . CoRR, (2023)Low-Latency Asynchronous Logic Design for Inference at the Edge., , , and . DATE, page 370-373. IEEE, (2021)Low-Latency Asynchronous Logic Design for Inference at the Edge., , , and . CoRR, (2020)Low-Power Audio Keyword Spotting using Tsetlin Machines., , , , , , , and . CoRR, (2021)Explainability and Dependability Analysis of Learning Automata based AI Hardware., , and . IOLTS, page 1-4. IEEE, (2020)Self-timed, minimum latency circuits for the internet of things., , , and . Integr., (2019)A multi-step finite-state automaton for arbitrarily deterministic Tsetlin Machine learning., , , , , , , and . Expert Syst. J. Knowl. Eng., (May 2023)An Energy-efficient Capacitive-Memristive Content Addressable Memory., , , , , and . CoRR, (2024)Power proportional adder design for Internet of Things in a 65 nm process., , , and . PATMOS, page 1-6. IEEE, (2017)