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Power-Aware Design of Electronic System Level using Interoperation of Hybrid and Distributed Simulations.

, , , , , and . SBCCI, page 18:1-18:7. ACM, (2015)

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ADeLe: Rapid Architectural Simulation for Approximate Hardware., , , , and . SBAC-PAD, page 9-16. IEEE, (2018)Performance Models for Heterogeneous Systems Applied to the Dark Silicon-Aware Design Space Exploration., , , , , and . SBAC-PAD, page 9-16. IEEE, (2019)MultiExplorer: A tool set for multicore system-on-chip design exploration., , , and . ASAP, page 160-161. IEEE Computer Society, (2015)Thread Footprint Analysis for the Design of Multithreaded Applications and Multicore Systems., , , , and . SBAC-PAD (Workshops), page 55-60. IEEE Computer Society, (2016)MPSoCBench: A toolset for MPSoC system level evaluation., , , , and . ICSAMOS, page 164-171. IEEE, (2014)On the Dark Silicon Automatic Evaluation on Multicore Processors., , , , , and . SBAC-PAD, page 166-173. IEEE Computer Society, (2016)Power-Aware Design of Electronic System Level using Interoperation of Hybrid and Distributed Simulations., , , , , and . SBCCI, page 18:1-18:7. ACM, (2015)Scalability evaluation in many-core systems due to the memory organization., , , and . ICECS, page 396-399. IEEE, (2016)MPSoCBench: um framework para avaliação de ferramentas e metodologias para sistemas multiprocessados em chip.. University of Campinas, Brazil, (2015)ndltd.org (oai:agregador.ibict.br.RI_UNICAMP:oai:repositorio.unicamp.br:REPOSIP/304717).