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The Sizing Rules Method for Analog Integrated Circuit Design.

, , , and . ICCAD, page 343-349. IEEE Computer Society, (2001)

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MARS: Matching-Driven Analog Sizing., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (8): 1145-1158 (2012)Tolerance Design of Analog Circuits using a Branch-and-Bound Based Approach., and . Journal of Circuits, Systems, and Computers, (2012)A Hierarchical Performance Equation Library for Basic Op-Amp Design., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (7): 1976-1989 (2022)Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming., , and . DATE, page 75-80. EDA Consortium, San Jose, CA, USA, (2007)A random and pseudo-gradient approach for analog circuit sizing with non-uniformly discretized parameters., , , and . ICCD, page 188-193. IEEE Computer Society, (2008)Pareto-Front Computation and Automatic Sizing of CPPLLs., , , and . ISQED, page 481-486. IEEE Computer Society, (2007)A Parametric Test Method for Analog Components in Integrated Mixed-Signal Circuits., , and . ICCAD, page 557-561. IEEE Computer Society, (2000)Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing., , and . ICCAD, page 847-854. IEEE Computer Society / ACM, (2004)A Successive Approach to Compute the Bounded Pareto Front of Practical Multiobjective Optimization Problems., , and . SIAM J. Optimization, 20 (2): 915-934 (2009)Predicting future product performance: modeling and evaluation of standard cells in FinFET technologies., , and . DAC, page 33:1-33:6. ACM, (2013)