( en | de | ru )

 

Disambiguation of "Yakovlev, Alexandre"

Author of the publication

copydeleteadd this publication to your clipboard
Secure Design Flow for Asynchronous Multi-valued Logic Circuits.

, , and . ISMVL, page 264-269. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Sergey Yakovlev

Alexandre Darmoise

Alexandre Martins

Alexandre Varnek

Alexandre Alexeev

 

Other publications of authors with the same name

Signal Graphs: From Self-Timed to Timed Ones., and . PNPM, page 199-206. IEEE Computer Society, (1985)Synthesis of Speed-Independent Circuits from STG-Unfolding Segment., , , , and . DAC, page 16-21. ACM Press, (1997)Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis., , , , and . DAC, page 63-66. ACM Press, (1996)Global interconnections in FPGAs: modeling and performance analysis., , , , , and . SLIP, page 51-58. ACM, (2008)Analyzing Semantics of Concurrent Hardware Specifications., and . ICPP (3), page 211-218. Pennsylvania State University Press, (1989)0-271-00686-2.Evaluation of energy-recovering interconnects for low-power 3D stacked ICs., , , and . 3DIC, page 1-5. IEEE, (2009)Modelling, analysis and synthesis of asynchronous control circuits using Petri nets., , , and . Integr., 21 (3): 143-170 (1996)Synchronous and asynchronous A-D conversion., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (2): 217-220 (2000)A low latency asynchronous arbitration circuit., , and . IEEE Trans. Very Large Scale Integr. Syst., 2 (3): 372-377 (1994)Low Latency Synchronization Through Speculation., and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 278-288. Springer, (2004)