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Disambiguation of "Cawley, Seamus"

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EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architectures.

, , , , , , and . SoC, page 139-145. IEEE, (2010)

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Other publications of authors with the same name

The Si elegans Project - The Challenges and Prospects of Emulating Caenorhabditis elegans., , , , , , , , , and 7 other author(s). Living Machines, volume 8608 of Lecture Notes in Computer Science, page 436-438. Springer, (2014)Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC., , , , , , , , , and . RSP, page 76-82. IEEE, (2018)Enhancing learning of digital systems using a remote FPGA lab., and . ReCoSoC, page 1-8. IEEE, (2011)EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architectures., , , , , , and . SoC, page 139-145. IEEE, (2010)Remote FPGA Lab with Interactive Control and Visualisation Interface., , , , , , , , and . FPL, page 496-499. IEEE Computer Society, (2011)Remote FPGA Lab for Enhancing Learning of Digital Systems., , and . ACM Trans. Reconfigurable Technol. Syst., 5 (3): 18:1-18:13 (2012)Fixed latency on-chip interconnect for hardware spiking neural network architectures., , , , , , , , and . Parallel Comput., 39 (9): 357-371 (2013)Exploring Neural Principles with Si elegans, a Neuromimetic Representation of the Nematode Caenorhabditis elegans., , , , , , , , , and 7 other author(s). NEUROTECHNIX, page 189-194. SciTePress, (2014)A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks., , , , , and . Int. J. Reconfigurable Comput., (2009)