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Disambiguation of "Bahar, R. Iris"

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Timing Analysis of Combinational Circuits using ADD's.

, , , , and . EDAC-ETC-EUROASIC, page 625-629. IEEE Computer Society, (1994)

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Bahar Haghanipour

Kayvan Baharmast

Cengiz Iristay

Aida Baharuddin

Bahar Hadzaad

Genexpressionen der Cytochrome P450 1B1 und 2E1 in Abhängigkeit einer PAH-Einwirkung infolge Rauchens sowie der individuellen Suszeptibilität. Uni Gießen, (2009)
 

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ABACUS: A technique for automated behavioral synthesis of approximate computing circuits., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Understanding the Impact of Precision Quantization on the Accuracy and Energy of Neural Networks., , , , and . CoRR, (2016)CMOS dynamic power estimation based on collapsible current source transistor modeling., , , , , and . ISLPD, page 111-116. ACM, (1995)SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs., , , , , , and . CODES+ISSS, page 39-48. ACM, (2011)Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware Implementation., , , , and . SPAA, page 297-308. ACM, (2019)Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (10): 1101-1115 (1997)Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack., , , , , , and . J. Electron. Test., 35 (6): 887-900 (2019)Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies., and . ACM Trans. Design Autom. Electr. Syst., 13 (2): 36:1-36:2 (2008)LipoPose: Adapting Cellpose to Lipid Nanoparticle Segmentation., , , , and . BIOIMAGING, page 115-123. SCITEPRESS, (2023)Thermal-Aware Design Techniques for Nanometer CMOS Circuits., , , , , , , and . J. Low Power Electron., 4 (3): 374-384 (2008)