From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

A 0.07mm2 210mW Single-1.1V-Supply 14-bit 10GS/s DAC with Concentric Parallelogram Routing and Output Impedance Compensation., и . VLSI Circuits, стр. 136-. IEEE, (2019)An analog optimum torque control IC for a 200W wind energy conversion system with over 99% MPPT accuracy, 1.7% THDi and 0.99 power factor., , , , и . CICC, стр. 1-4. IEEE, (2014)A 0.07-mm2 162-mW DAC Achieving >65 dBc SFDR and < -70 dBc IM3 at 10 GS/s With Output Impedance Compensation and Concentric Parallelogram Routing., и . IEEE J. Solid State Circuits, 55 (9): 2478-2488 (2020)High-speed DACs with random multiple data-weighted averaging algorithm., , , и . ISCAS (1), стр. 993-996. IEEE, (2003)Leading-Subcycles Capacitor Error-Averaging Scheme for Cyclic ADCs., , и . IEEE Trans. Instrumentation and Measurement, 60 (3): 776-783 (2011)A monolithic capacitor-current-controlled hysteretic buck converter with transient-optimized feedback circuit., , , и . A-SSCC, стр. 57-60. IEEE, (2014)16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme., , и . ISSCC, стр. 256-258. IEEE, (2020)Nyquist-Rate Current-Steering Digital-to-Analog Converters With Random Multiple Data-Weighted Averaging Technique and QN Rotated Walk Switching Scheme., , и . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (11): 1264-1268 (2006)Capacitor-Swapping Cyclic A/D Conversion Techniques With Reduced Mismatch Sensitivity., и . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (12): 1219-1223 (2008)An automatic coefficient design methodology for high-order bandpass sigma-delta modulator with single-stage structure., и . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (7): 580-584 (2006)