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NTT Multiplication for NTT-unfriendly Rings New Speed Records for Saber and NTRU on Cortex-M4 and AVX2.

, , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021 (2): 159-188 (2021)

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Barrett Multiplication for Dilithium on Embedded Devices., , and . IACR Cryptol. ePrint Arch., (2023)Formal Verification of Emulated Floating-Point Arithmetic in Falcon.. IACR Cryptol. ePrint Arch., (2024)NTT Multiplication for NTT-unfriendly Rings New Speed Records for Saber and NTRU on Cortex-M4 and AVX2., , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021 (2): 159-188 (2021)Multi-Parameter Support with NTTs for NTRU and NTRU Prime on Cortex-M4., , and . IACR Cryptol. ePrint Arch., (2022)Neon NTT: Faster Dilithium, Kyber, and Saber on Cortex-A72 and Apple M1., , , , and . IACR Cryptol. ePrint Arch., (2021)Verified NTT Multiplications for NISTPQC KEM Lattice Finalists: Kyber, SABER, and NTRU., , , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022 (4): 718-750 (2022)Polynomial Multiplication in NTRU Prime Comparison of Optimization Strategies on Cortex-M4., , , , , , , , , and 1 other author(s). IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021 (1): 217-238 (2021)Algorithmic Views of Vectorized Polynomial Multipliers for NTRU and NTRU Prime (Long Paper)., , , , and . IACR Cryptol. ePrint Arch., (2023)Polynomial Multiplication in NTRU Prime: Comparison of Optimization Strategies on Cortex-M4., , , , , , , , , and 1 other author(s). IACR Cryptol. ePrint Arch., (2020)Multi-moduli NTTs for Saber on Cortex-M3 and Cortex-M4., , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022 (1): 127-151 (2022)