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Design and Analysis of Low Power and High SFDR Direct Digital Frequency Synthesizer., , , , , , и . IEEE Access, (2020)A Decoupled Vibratory Gyroscope using a Mixed Micro-machining Technology., , , , , и . ICRA, стр. 3412-3416. IEEE, (2001)LW-DEM: Designing a Low Power Digital-to-Analog Converter Using Lightweight Dynamic Element Matching Technique., , , , , , , и . IEEE Access, (2019)A 0.5 V 8-12 Bit 300 KSPS SAR ADC With Adaptive Conversion Time Detection-and-Control for High Immunity to PVT Variations., , , , , , и . IEEE Access, (2020)A 3.2-GHz 178-fsrms Jitter Subsampling PLL/DLL-Based Injection-Locked Clock Multiplier., , , , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 30 (7): 915-925 (2022)Time-Interleaved SAR ADC with Background Timing-Skew Calibration for UWB Wireless Communication in IoT Systems., , , , , , , и . Sensors, 20 (8): 2430 (2020)Quality factor measurement of micro gyroscope structure according to vacuum level and desired Q-factor range package method., , , , , и . Microelectron. Reliab., 48 (6): 948-952 (2008)A 3.2 GHz 178fsrms Jitter Injection Locked Clock Multiplier Using Sub-Sampling FTL and DLL for In-Band Noise Improvement., , , , , , , и . A-SSCC, стр. 1-3. IEEE, (2021)A 12-bit Multi-Channel R-R DAC Using a Shared Resistor String Scheme for Area-Efficient Display Source Driver., , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (11): 3688-3697 (2018)A 0.5 V 10 b 3 MS/s 2-Then-1b/Cycle SAR ADC With Digital-Based Time-Domain Reference and Dual-Mode Comparator., , , , и . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 909-913 (2022)