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Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform.

, , , and . ISCAS, page 1875-1878. IEEE, (2007)

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Preface., , , , , , , , , and 1 other author(s). AHS, IEEE, (2013)Analysis and Implementation of Multiple-Input, Multiple-Output VBLAST Receiver From Area and Power Efficiency Perspective., , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (11): 1281-1286 (2006)Low-Power H.264 Video Compression Architectures for Mobile Communication., , and . IEEE Trans. Circuits Syst. Video Technol., 19 (9): 1251-1261 (2009)A High Dynamic Range 128 × 120 3-D Stacked CMOS SPAD Image Sensor SoC for Fluorescence Microendoscopy., , , , , , , and . IEEE J. Solid State Circuits, 57 (6): 1649-1660 (2022)Implementation of a sic based MC-CDMA base station receiver., , , , and . Eur. Trans. Telecommun., 13 (5): 513-518 (2002)A novel shifting balance theory-based approach to optimization of an energy-constrained modulation scheme for wireless sensor networks., , , and . IEEE Congress on Evolutionary Computation, page 2749-2756. IEEE, (2008)Multi-objective evolutionary optimizations of a space-based reconfigurable sensor network under hard constraints., , , and . Soft Comput., 15 (1): 25-36 (2011)Dynamically programmable Reed Solomon processor with embedded Galois Field multiplier., , , and . FPT, page 269-272. IEEE, (2008)The development of high performance FFT IP cores through hybrid low power algorithmic methodology., , , and . ASP-DAC, page 549-552. ACM Press, (2005)Addressing Future Space Challenges using Reconfigurable Instruction Cell Based Architectures., , and . AHS, page 199-203. IEEE Computer Society, (2008)