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A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.

M. Solé, A. Bischof, L. Bergamini, P. Dallemagne, S. Emery, K. Badami, J. Deng, T. Mavrogordatos, E. Azarkhish, L. Zahnd, C. Cosentino, M. Augustyniak, and Y. Zha. ESSCIRC, page 73-76. IEEE, (2019)

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Stéphane Klein

Stéphane Haussler

Stéphane Müller

Stéphane Aubry

Stéphane Audière

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Comparison of Capacitive DAC Architectures for Power and Area Efficient SAR ADC Designs.A. Ahuja, K. Badami, C. Barbelenet, and S. Emery. ISCAS, page 1-5. IEEE, (2021)Single-Battery Cooperative Sensors For Multi-Lead Long Term Ambulatory ECG Measurement.K. Badami, M. Solé, E. Azarkhish, A. Fivaz, M. Rapin, O. Chételat, and S. Emery. BioCAS, page 1-4. IEEE, (2021)A Construction Kit for Efficient Low Power Neural Network Accelerator Designs.P. Jokic, E. Azarkhish, A. Bonetti, M. Pons, S. Emery, and L. Benini. ACM Trans. Embed. Comput. Syst., 21 (5): 56:1-56:36 (September 2022)Improving Memory Utilization in Convolutional Neural Network Accelerators.P. Jokic, S. Emery, and L. Benini. IEEE Embed. Syst. Lett., 13 (3): 77-80 (2021)Ultra low power microelectronics for wearable and medical devices.P. Rüedi, A. Bishof, M. Augustyniak, P. Persechini, J. Nagel, M. Pons, S. Emery, and O. Chételat. DATE, page 1426-1431. IEEE, (2017)An Ultra-Low-Power Serial Implementation for Sigmoid and Tanh Using CORDIC Algorithm.Y. Chang, P. Jokic, S. Emery, and L. Benini. DATE, page 1-2. IEEE, (2023)A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS.M. Pons, C. Müller, D. Ruffieux, J. Nagel, S. Emery, A. Burg, S. Tanahashi, Y. Tanaka, and A. Takeuchi. CICC, page 1-4. IEEE, (2019)Battery-Less Face Recognition at the Extreme Edge.P. Jokic, S. Emery, and L. Benini. NEWCAS, page 1-4. IEEE, (2021)BinaryEye: A 20 kfps Streaming Camera System on FPGA with Real-Time On-Device Image Recognition Using Binary Neural Networks.P. Jokic, S. Emery, and L. Benini. SIES, page 1-7. IEEE, (2018)A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.M. Solé, A. Bischof, L. Bergamini, P. Dallemagne, S. Emery, K. Badami, J. Deng, T. Mavrogordatos, E. Azarkhish, L. Zahnd and 3 other author(s). ESSCIRC, page 73-76. IEEE, (2019)

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Disambiguation of "Emery, Stéphane"

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A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.

Please choose a person to relate this publication to

Stéphane Klein

Stéphane Haussler

Stéphane Müller

Stéphane Aubry

Stéphane Audière

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Emery, Stéphane"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.

Please choose a person to relate this publication to

Stéphane Klein

Stéphane Haussler

Stéphane Müller

Stéphane Aubry

Stéphane Audière

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 20 Channel EMG SoC with an Integrated 32b RISC Core for Real-Time Wireless Prosthetic Control.