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Instantaneous foveated preview for progressive Monte Carlo rendering., , , , , and . Comput. Vis. Media, 4 (3): 267-276 (2018)Energy-Delay Trade-Offs in Instruction Register File Design., , and . NORCAS, page 1-7. IEEE, (2018)Power optimizations for transport triggered SIMD processors., , , , , , , , , and 1 other author(s). SAMOS, page 303-309. IEEE, (2015)Energy-Efficient Instruction Delivery in Embedded Systems With Domain Wall Memory., , , , and . IEEE Trans. Computers, 71 (9): 2010-2021 (2022)Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode., , and . IEEE Trans. Computers, 73 (2): 560-573 (February 2024)Efficient OpenCL system integration of non-blocking FPGA accelerators., , , , , and . Microprocess. Microsystems, (March 2023)AEx: Automated High-Level Synthesis of Compiler Programmable Co-Processors., , , , , and . J. Signal Process. Syst., 95 (9): 1051-1065 (September 2023)System Simulation of Memristor Based Computation in Memory Platforms., , , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 152-168. Springer, (2020)Unified OpenCL Integration Methodology for FPGA Designs., , , , and . NorCAS, page 1-7. IEEE, (2021)AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management., , , and . NorCAS, page 1-7. IEEE, (2023)