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Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches.

, , and . IEEE Trans. Computers, 49 (11): 1215-1227 (2000)

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Implementing Traffic Shaping and Link Scheduling on a High-Performance Server., and . IEEE Real Time Technology and Applications Symposium, page 216-225. IEEE Computer Society, (2001)Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches., , and . IEEE Trans. Computers, 49 (11): 1215-1227 (2000)STREAMER: Hardware Support for Smoothed Transmission of Stored Video over ATM., , and . PCRCW, volume 1417 of Lecture Notes in Computer Science, page 75-88. Springer, (1997)Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches., , and . IEEE Real Time Technology and Applications Symposium, page 203-212. IEEE Computer Society, (1997)