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PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model., , and . CoRR, (2017)Post-Route Alleviation of Dense Meander Segments in High-Performance Printed Circuit Boards., , , and . CoRR, (2017)Post-route refinement for high-frequency PCBs considering meander segment alleviation., , , and . ACM Great Lakes Symposium on VLSI, page 323-324. ACM, (2013)Emulation of an ASIC Power, Temperature and Aging Monitor System for FPGA Prototyping., , , and . IOLTS, page 220-225. IEEE, (2018)Automatic generation of hierarchical placement rules for analog integrated circuits., , , and . ISPD, page 47-54. ACM, (2010)Synthesis-based methodology for high-speed multi-modulus divider., , and . SMACD, page 1-4. IEEE, (2016)PROTON: an automatic place-and-route tool for optical networks-on-chip., , , and . ICCAD, page 138-145. IEEE, (2013)SteppingNet: A Stepping Neural Network with Incremental Accuracy Enhancement., , , , , , and . CoRR, (2022)Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning., , , , and . CoRR, (2017)Fast Power Estimation of Large Circuits., , and . IEEE Des. Test Comput., 13 (1): 70-78 (1996)