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A 0.0023 mm2/ch. Delta-Encoded, Time-Division Multiplexed Mixed-Signal ECoG Recording Architecture With Stimulus Artifact Suppression.

, , , , , and . IEEE Trans. Biomed. Circuits Syst., 14 (2): 319-331 (2020)

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A Single-Chip Bidirectional Neural Interface With High-Voltage Stimulation and Adaptive Artifact Cancellation in Standard CMOS., , , , , , and . IEEE J. Solid State Circuits, 55 (7): 1749-1761 (2020)High-voltage compliant, capacitive-load invariant neural stimulation electronics compatible with standard bulk-CMOS integration., , , and . BioCAS, page 260-263. IEEE, (2014)Inferring Cortical Connectivity From ECoG Signals Using Graph Signal Processing., , , , , , and . IEEE Access, (2019)A high-voltage compliant, electrode-invariant neural stimulator front-end in 65nm bulk-CMOS., , , , and . ESSCIRC, page 229-232. IEEE, (2016)A 0.0023 mm2/ch. Delta-Encoded, Time-Division Multiplexed Mixed-Signal ECoG Recording Architecture With Stimulus Artifact Suppression., , , , , and . IEEE Trans. Biomed. Circuits Syst., 14 (2): 319-331 (2020)A Bidirectional Brain Computer Interface with 64-Channel Recording, Resonant Stimulation and Artifact Suppression in Standard 65nm CMOS., , , , , and . ESSCIRC, page 77-80. IEEE, (2019)A 46-channel Vector Stimulator with 50mV Worst-Case Common-Mode Artifact for Low-Latency Adaptive Closed-Loop Neuromodulation., , , , , , , , , and . CICC, page 1-2. IEEE, (2021)