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Highly linear TIA for SAW-less FDD receivers., , and . A-SSCC, page 117-120. IEEE, (2016)Exact Design of High-frequency SC Circuits with Low-gain Op Amps., , and . ISCAS, page 1014-1017. IEEE, (1993)A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz., , and . IEEE J. Solid State Circuits, 32 (7): 926-932 (1997)A Dither-Less All Digital PLL for Cellular Transmitters., , , , and . IEEE J. Solid State Circuits, 47 (8): 1908-1920 (2012)A 400-μW IoT Low-IF Voltage-Mode Receiver Front-End With Charge-Sharing Complex Filter., , , and . IEEE J. Solid State Circuits, 57 (7): 1957-1967 (2022)A 72-mW CMOS 802.11a direct conversion front-end with 3.5-dB NF and 200-kHz 1/f noise corner., , , , and . IEEE J. Solid State Circuits, 40 (4): 970-977 (2005)A 1.3 GHz low-phase noise fully tunable CMOS LC VCO., , and . IEEE J. Solid State Circuits, 35 (3): 356-361 (2000)A 200-MSample/s trellis-coded PRML read/write channel with analog adaptive equalizer and digital servo., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 32 (11): 1824-1838 (1997)Two-Dimensions Vernier Time-to-Digital Converter., , and . IEEE J. Solid State Circuits, 45 (8): 1504-1512 (2010)A low power/noise emission LTE fully class A/B transmitter with a programmable output balun., , and . ICECS, page 802-805. IEEE, (2014)