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Disambiguation of "Markulic, Nereo"

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A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion.

, , , , , , and . ISSCC, page 58-60. IEEE, (2019)

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Nereo Kalebi

 

Other publications of authors with the same name

A 9.2-12.7 GHz Wideband Fractional-N Subsampling PLL in 28 nm CMOS With 280 fs RMS Jitter., , , and . IEEE J. Solid State Circuits, 50 (5): 1203-1213 (2015)A Self-Calibrated 16-GHz Subsampling-PLL-Based Fast-Chirp FMCW Modulator With 1.5-GHz Bandwidth., , , and . IEEE J. Solid State Circuits, 54 (12): 3503-3512 (2019)A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion., , , , , , and . ISSCC, page 58-60. IEEE, (2019)A Fractional-n subsampling PLL based on a digital-to-time converter., , , and . MIPRO, page 66-71. IEEE, (2016)A 1-MS/s to 1-GS/s Ringamp-Based Pipelined ADC With Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16 nm., , , , , and . IEEE J. Solid State Circuits, 56 (4): 1227-1240 (2021)A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error., , , and . ISSCC, page 408-410. IEEE, (2019)Calibration Techniques for Optimizing Performance of High-Speed ADCs., , , and . CICC, page 1-8. IEEE, (2023)A 10-bit, 550-fs step Digital-to-Time Converter in 28nm CMOS., , , and . ESSCIRC, page 79-82. IEEE, (2014)A 5.5-GHz Background-Calibrated Subsampling Polar Transmitter With -41.3-dB EVM at 1024 QAM in 28-nm CMOS., , , , , and . IEEE J. Solid State Circuits, 54 (4): 1059-1073 (2019)A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS., , , , , , and . IEEE J. Solid State Circuits, 57 (4): 1112-1124 (2022)