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Document replication and distribution in extensible geographically distributed web servers., , and . J. Parallel Distributed Comput., 63 (10): 927-944 (2003)Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores., , and . ERSA, page 119-128. CSREA Press, (2005)Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs., and . IPDPS, IEEE Computer Society, (2004)High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs., , and . IEEE Trans. Parallel Distributed Syst., 18 (10): 1377-1392 (2007)Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems., and . IEEE Trans. Parallel Distributed Syst., 18 (4): 433-448 (2007)Energy Performance of Floating-Point Matrix Multiplication on FPGAs., and . ERSA, page 316. CSREA Press, (2004)Designing Scalable FPGA-Based Reduction Circuits Using Pipelined Floating-Point Cores., , and . IPDPS, IEEE Computer Society, (2005)Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores., , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (2): 167-176 (2008)Optimizing Matrix Multiplication on Heterogeneous Reconfigurable Systems., and . PARCO, volume 15 of Advances in Parallel Computing, page 561-568. IOS Press, (2007)Sparse Matrix-Vector multiplication on FPGAs., and . FPGA, page 63-74. ACM, (2005)