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Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications.

, , , , and . ISHPC, volume 1336 of Lecture Notes in Computer Science, page 405-414. Springer, (1997)

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Hardware Organization of a Low Level Parallel Processor., , , and . IFIP Congress, page 855-860. (1977)Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism., , , , and . IFIP Congress, page 181-186. (1980)A Web-Based Education Tool for Collaborative Learning of Assembly Programming., and . ICWI, page 703-710. IADIS, (2003)Simulating realistic force and shape of virtual cloth with adaptive meshes and its parallel implementation in OpenMP., , , , , and . Parallel and Distributed Computing and Networks, page 386-391. IASTED/ACTA Press, (2004)A parallel processor system for three-dimensional color graphics., , , , and . SIGGRAPH, page 67-76. ACM, (1984)General mapping of feed-forward neural networks onto an MIMD computer., , , and . ICNN, page 1048-1053. IEEE, (1995)Evaluation of Three Quads Using Matrix Transpose., , and . J. Inf. Process., (2018)Improvement of message communication in concurrent logic language., , , , , and . PASCO, page 156-164. ACM, (1997)Toward advanced parallel processing: exploiting parallelism at task and instruction levels., , and . IEEE Micro, 11 (4): 16-19 (1991)A Dynamically Microprogammable Computer with Low-Level Parallelism., , , and . IEEE Trans. Computers, 29 (7): 577-595 (1980)