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A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier., , , , , , , , and . ESSCIRC, page 436-439. IEEE, (2007)A Fully Reconfigurable Software-Defined Radio Transceiver in 0.13μm CMOS., , , , , , , , , and 3 other author(s). ISSCC, page 346-607. IEEE, (2007)Efficient self-correction scheme for static non-idealities in nano-scale quadrature digital RF transmitters., , , , , , , , and . SiPS, page 71-76. IEEE, (2013)A 2-mm2 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 44 (12): 3486-3498 (2009)A 5 mm2 40 nm LP CMOS Transceiver for a Software-Defined Radio Platform., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 45 (12): 2794-2806 (2010)Ensuring consistency during front-end design using an object-oriented interfacing tool called NETLISP., , , , and . DAC, page 889-892. ACM, (2006)A 5mm2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver., , , , , , , , , and 1 other author(s). ISSCC, page 458-459. IEEE, (2010)Efficient duty-cycle mismatch compensation in digital transmitter., , , , , , , , and . ICASSP, page 4998-5002. IEEE, (2014)