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29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration.

A. Ali, H. Dinc, P. Bhoraskar, C. Dillon, S. Puckett, B. Gray, C. Speir, J. Lanford, D. Jarman, J. Brunsilius, P. Derounian, B. Jeffries, U. Mehta, M. McShea, and H. Lee. ISSCC, page 482-483. IEEE, (2014)

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Melanie Dillon

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A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration.A. Ali, H. Dinc, P. Bhoraskar, S. Bardsley, C. Dillon, M. McShea, J. Prabhakar, and S. Puckett. IEEE J. Solid State Circuits, 55 (12): 3210-3224 (2020)A 100-dB SFDR 80-MSPS 14-Bit 0.35-$ muhbox m$BiCMOS Pipeline ADC.S. Bardsley, C. Dillon, R. Kummaraguntla, C. Lane, A. Ali, B. Rigsbee, and D. Combs. IEEE J. Solid State Circuits, 41 (9): 2144-2153 (2006)A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter.A. Ali, C. Dillon, R. Sneed, A. Morgan, S. Bardsley, J. Kornblum, and L. Wu. IEEE J. Solid State Circuits, 41 (8): 1846-1855 (2006)A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration.A. Ali, A. Morgan, C. Dillon, G. Patterson, S. Puckett, P. Bhoraskar, H. Dinc, M. Hensley, R. Stop, S. Bardsley and 4 other author(s). IEEE J. Solid State Circuits, 45 (12): 2602-2612 (2010)16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background Calibration.A. Ali, H. Dinc, P. Bhoraskar, S. Bardsley, C. Dillon, M. Kumar, M. McShea, R. Bunch, J. Prabhakar, and S. Puckett. ISSCC, page 250-252. IEEE, (2020)A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration.A. Ali, H. Dinc, P. Bhoraskar, C. Dillon, S. Puckett, B. Gray, C. Speir, J. Lanford, J. Brunsilius, P. Derounian and 4 other author(s). IEEE J. Solid State Circuits, 49 (12): 2857-2867 (2014)A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration.A. Ali, A. Morgan, C. Dillon, G. Patterson, S. Puckett, M. Hensley, R. Stop, P. Bhoraskar, S. Bardsley, D. Lattimore and 3 other author(s). ISSCC, page 292-293. IEEE, (2010)An Object-Based Image Analysis Workflow for Monitoring Shallow-Water Aquatic Vegetation in Multispectral Drone Imagery.D. Chabot, C. Dillon, A. Shemrock, N. Weissflog, and E. Sager. ISPRS Int. J. Geo Inf., 7 (8): 294 (2018)29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration.A. Ali, H. Dinc, P. Bhoraskar, C. Dillon, S. Puckett, B. Gray, C. Speir, J. Lanford, D. Jarman, J. Brunsilius and 5 other author(s). ISSCC, page 482-483. IEEE, (2014)A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither.A. Ali, H. Dinc, P. Bhoraskar, S. Puckett, A. Morgan, N. Zhu, Q. Yu, C. Dillon, B. Gray, J. Lanford and 7 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)

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Disambiguation of "Dillon, Christopher"

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29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration.

Please choose a person to relate this publication to

Melanie Dillon

Myles Dillon

Keith Dillon

Christopher Christopher

Jörg Christopher

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dillon, Christopher"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration.

Please choose a person to relate this publication to

Melanie Dillon

Myles Dillon

Keith Dillon

Christopher Christopher

Jörg Christopher

Other publications of authors with the same name

Disambiguation

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29.3 A 14b 1GS/s RF sampling pipelined ADC with background calibration.