( en | de | ru )

 

Disambiguation of "Deng, Wei"

Author of the publication

copydeleteadd this publication to your clipboard
A Novel Charging Scheme Based on Network Capabilities for 5G Industrial Networks.

, , , , and . IEEE Wirel. Commun., 28 (3): 150-155 (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wei Wei

Wei Wei

Wei Wei

Wei Wei

Wei Wei

 

Other publications of authors with the same name

Eigan: Enhanced Inpainting Generative Adversarial Network., , , , and . ICME, page 1-6. IEEE, (2020)Harnessing renewable energy in cloud datacenters: opportunities and challenges., , , , and . IEEE Netw., 28 (1): 48-55 (2014)Analysis of the Light Propagation Model of the Optical Voltage Sensor for Suppressing Unreciprocal Errors., , , , , and . Sensors, 17 (1): 85 (2017)FIOS: a flexible virtualized I/O subsystem to alleviate interference among virtual machines., , , , and . ICUIMC, page 61:1-61:10. ACM, (2012)A GaN-Based Wireless Power and Information Transmission Method Using Dual-Frequency Programmed Harmonic Modulation., , , , , and . IEEE Access, (2020)A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC With Dual Rising-Edge Fractional-Phase Detector., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (1): 60-73 (2020)Spatial and temporal variation of evapotranspiration estimated by MODIS data over South Asia., , and . IGARSS, page 3049-3052. IEEE, (2014)An Energy-Efficient 10-Gb/s CMOS Millimeter-Wave Transceiver With Direct-Modulation Digital Transmitter and I/Q Phase-Coupled Frequency Synthesizer., , , , , , , , , and . IEEE J. Solid State Circuits, 55 (8): 2027-2042 (2020)A D-Band Joint Radar-Communication CMOS Transceiver., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 58 (2): 411-427 (February 2023)A 2.2 GHz -242dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture., , , , , , , , , and . IEEE J. Solid State Circuits, 51 (6): 1385-1397 (2016)