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FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment.

A. Page, and T. Mohsenin. FCCM, page 200. IEEE Computer Society, (2016)

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Minimizing Classification Energy of Binarized Neural Network Inference for Wearable Devices.M. Hosseini, H. Paneliya, U. Kallakuri, M. Khatwani, and T. Mohsenin. ISQED, page 259-264. IEEE, (2019)2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection.H. Sayadi, H. Makrani, S. Dinakarrao, T. Mohsenin, A. Sasan, S. Rafatirad, and H. Homayoun. DATE, page 728-733. IEEE, (2019)Big vs little core for energy-efficient Hadoop computing.M. Malik, K. Neshatpour, T. Mohsenin, A. Sasan, and H. Homayoun. DATE, page 1480-1485. IEEE, (2017)An embedded FPGA accelerator for a stand-alone dual-mode assistive device.A. Jafari, M. Ghovanloo, and T. Mohsenin. BioCAS, page 1-4. IEEE, (2017)A Low-Power Wearable Stand-Alone Tongue Drive System for People With Severe Disabilities.A. Jafari, N. Buswell, M. Ghovanloo, and T. Mohsenin. IEEE Trans. Biomed. Circuits Syst., 12 (1): 58-67 (2018)A many-core platform implemented for multi-channel seizure detection.J. Bisasky, D. Chandler, and T. Mohsenin. ISCAS, page 564-567. IEEE, (2012)Deep Belief Networks used on High Resolution Multichannel Electroencephalography Data for Seizure Detection.J. Turner, A. Page, T. Mohsenin, and T. Oates. CoRR, (2017)Guest Editorial Cross-Layer Designs, Methodologies, and Systems to Enable Micro AI for On-Device Intelligence.T. Mohsenin, I. Partin-Vaisband, H. Homayoun, J. Seo, and X. Zhang. IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (4): 527-531 (2021)A Hardware Accelerator for Language-Guided Reinforcement Learning.A. Shiri, A. Mazumder, B. Prakash, H. Homayoun, N. Waytowich, and T. Mohsenin. IEEE Des. Test, 39 (3): 37-44 (2022)Cyclic Sparsely Connected Architectures for Compact Deep Convolutional Neural Networks.M. Hosseini, N. Manjunath, B. Prakash, A. Mazumder, V. Chandrareddy, H. Homayoun, and T. Mohsenin. IEEE Trans. Very Large Scale Integr. Syst., 29 (10): 1757-1770 (2021)

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Disambiguation of "Mohsenin, Tinoosh"

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FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment.

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Disambiguation of "Mohsenin, Tinoosh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment.

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FPGA-Based Reduction Techniques for Efficient Deep Neural Network Deployment.