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Disambiguation of "Moreno, Edward D."

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Tuning Shared Network Cache Size vs. Second-Level Cache Size in Clusters-Based Multiprocessors.

, , , and . PaCT, volume 1277 of Lecture Notes in Computer Science, page 398-399. Springer, (1997)

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Eduardo Moreno

Carlos Moreno

Alexander Moreno

Moreno Andreatta

José Moreno

 

Other publications of authors with the same name

Current Consumption Analysis of AES and PRESENT Encryption Algorithms in FPGA Using the Welch Method., and . SSCC, volume 746 of Communications in Computer and Information Science, page 300-311. Springer, (2017)Tuning Shared Network Cache Size vs. Second-Level Cache Size in Clusters-Based Multiprocessors., , , and . PaCT, volume 1277 of Lecture Notes in Computer Science, page 398-399. Springer, (1997)A VLIW-based cryptoprocessor on FPGAs architecture and performance issues (abstract only)., , and . FPGA, page 278. ACM, (2005)Machine learning algorithms to detect DDoS attacks in SDN., , , , and . Concurr. Comput. Pract. Exp., (2020)A Flexible and Parameterized Architecture for Multicore Microcontroller., , and . J. Comput., 6 (11): 2277-2284 (2011)Internet of Things: A Survey on Communication Protocol Security., , , , , and . EATIS, page 17:1-17:5. ACM, (2018)Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets., , and . Euro-Par, volume 1300 of Lecture Notes in Computer Science, page 1017-1024. Springer, (1997)Performance Issues on Integration of Security Services., and . Trans. Comput. Sci., (2010)New advances in high-performance computing systems., , and . Concurr. Comput. Pract. Exp., (2019)On the Dark Silicon Automatic Evaluation on Multicore Processors., , , , , and . SBAC-PAD, page 166-173. IEEE Computer Society, (2016)