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Using advanced compiler technology to exploit the performance of the Cell Broadband EngineTM architecture.

, , , , , , , , , , , , , , , , и . IBM Syst. J., 45 (1): 59-84 (2006)

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Erwin Eichenberger

Christian Eichenberger

Christoph Eichenberger

Heiner Eichenberger

Patrick Eichenberger

 

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Impact of Load Imbalance on the Design of Software Barriers., и . ICPP (2), стр. 63-72. CRC Press, (1995)Optimum Modulo Schedules for Minimum Register Requirements., , и . International Conference on Supercomputing, стр. 31-40. ACM, (1995)Lower bounds on precedence-constrained scheduling for parallel processors., , и . Inf. Process. Lett., 83 (1): 27-32 (2002)Algorithms for Total Weighted Completion Time Scheduling., , и . SODA, стр. 852-853. ACM/SIAM, (1999)Minimizing Register Requirements of a Modulo Schedule via Optimum Stage Scheduling., , и . Int. J. Parallel Program., 24 (2): 103-132 (1996)Effective Cluster Assignment for Modulo Scheduling., и . MICRO, стр. 103-114. ACM/IEEE Computer Society, (1998)Balance Scheduling: Weighting Branch Tradeoffs in Superblocks., и . MICRO, стр. 272-283. ACM/IEEE Computer Society, (1999)Coordinating GPU threads for OpenMP 4.0 in LLVM., , , , , , , и . LLVM@SC, стр. 12-21. IEEE Computer Society, (2014)Register allocation for predicated code., и . MICRO, стр. 180-191. ACM / IEEE Computer Society, (1995)An integrated simdization framework using virtual vectors., , , и . ICS, стр. 169-178. ACM, (2005)