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Другие публикации лиц с тем же именем

An Examination of Fault Exposure Ratio., , и . IEEE Trans. Software Eng., 19 (11): 1087-1094 (1993)Testing for Timing Faults in Synchronous Sequential Integrated Circuits., и . ITC, стр. 560-573. IEEE Computer Society, (1983)An Introduction to Software Reliability Models., и . Int. CMG Conference, стр. 1237-1239. Computer Measurement Group, (1991)Testable design of BiCMOS circuits for stuck-open fault detection using single patterns., , , и . IEEE J. Solid State Circuits, 30 (8): 855-863 (августа 1995)Dynamic power minimization during combinational circuit testing as a traveling salesman problem., , , и . Congress on Evolutionary Computation, стр. 1088-1095. IEEE, (2005)Modeling the Vulnerability Discovery Process., и . ISSRE, стр. 129-138. IEEE Computer Society, (2005)Principal Component Analysis-based compensation for measurement errors due to mechanical misalignments in PCB testing., , , , и . ITC, стр. 467-476. IEEE Computer Society, (2010)Use of Storage Elements as Primitives for Modelling Faults in Synchronous Sequential Circuits., , и . VLSI Design, стр. 118-123. IEEE Computer Society, (1993)Security Vulnerabilities in Software Systems: A Quantitative Perspective., , и . DBSec, том 3654 из Lecture Notes in Computer Science, стр. 281-294. Springer, (2005)Automatic test generation using checkpoint encoding and antirandom testing., , и . ISSRE, стр. 84-95. IEEE Computer Society, (1997)