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Disambiguation of "Amarù, Luca Gaetano"

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BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition.

, , and . DAC, page 47:1-47:6. ACM, (2013)

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Gaetano Romano

Gaetano Cicinnati

Onesimus Buatre Amaru

Mona Amaru

Gaetano Vitale

 

Other publications of authors with the same name

Logic optimization and synthesis: Trends and directions in industry., , , and . DATE, page 1303-1305. IEEE, (2017)Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)., , , , and . FPGA, page 262. ACM, (2015)Multiple Independent Gate FETs: How many gates do we need?, , , , and . ASP-DAC, page 243-248. IEEE, (2015)LUT-Based Optimization For ASIC Design Flow., , , , , , , , and . DAC, page 871-876. IEEE, (2021)A Sound and Complete Axiomatization of Majority-n Logic., , , and . IEEE Trans. Computers, 65 (9): 2889-2895 (2016)BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition., , and . DAC, page 47:1-47:6. ACM, (2013)Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs., , , , , , and . DATE, page 625-630. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A fast pruning technique for low-power inexact Circuit design., , , , , and . LASCAS, page 1-4. IEEE, (2015)Digital, analog and RF design opportunities of three-independent-gate transistors., , , , , and . ISCAS, page 405-408. IEEE, (2016)High Speed Architectures for Finding the First two Maximum/Minimum Values., , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (12): 2342-2346 (2012)