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A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPs.

, , and . ICPP, page 267-276. IEEE Computer Society, (2010)

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Thermal management of manycore systems with silicon-photonic networks., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Enhancing the Parallelization of Non-bonded Interactions Kernel for Virtual Screening on GPUs., , , , , and . IWBBIO (2), volume 9044 of Lecture Notes in Computer Science, page 620-626. Springer, (2015)UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs., , , , , , , , and . ACM Trans. Archit. Code Optim., 13 (4): 35:1-35:25 (2016)MGPU-TSM: A Multi-GPU System with Truly Shared Memory., , , , , , , , and . CoRR, (2020)MGSim + MGMark: A Framework for Multi-GPU System Research., , , , , , , , , and 3 other author(s). CoRR, (2018)Efficient Hardware Barrier Synchronization in Many-Core CMPs., , and . IEEE Trans. Parallel Distributed Syst., 23 (8): 1453-1466 (2012)The Challenge of Classification Confidence Estimation in Dynamically-Adaptive Neural Networks., , , , and . SAMOS, volume 13227 of Lecture Notes in Computer Science, page 505-522. Springer, (2021)A novel network fabric for efficient spatio-temporal reduction in flexible DNN accelerators., , , and . NOCS, page 1-8. ACM, (2021)AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators., , , , , , , , and . CGO, page 143-157. IEEE, (2024)Multicore Platforms for Scientific Computing: Cell BE and NVIDIA Tesla., , , , and . CSC, page 167-173. CSREA Press, (2008)