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A Load-Balanced Switch with an Arbitrary Number of Linecards., , and . INFOCOM, page 2007-2016. IEEE, (2004)Versatile refresh: low complexity refresh scheduling for high-throughput multi-banked eDRAM., , , , and . SIGMETRICS, page 247-258. ACM, (2012)Matching Output Queueing with a Combined Input Output Queued Switch., , , and . INFOCOM, page 1169-1178. IEEE Computer Society, (1999)Practical algorithms for performance guarantees in buffered crossbars., , and . INFOCOM, page 981-991. IEEE, (2005)Towards Programmable Packet Scheduling., , , , , , , , , and . HotNets, page 23:1-23:7. ACM, (2015)Programmable Packet Scheduling at Line Rate., , , , , , , , , and . SIGCOMM, page 44-57. ACM, (2016)Configuring a load-balanced switch in hardware., , , and . Hot Interconnects, page 48-53. IEEE Computer Society, (2004)Programmable Packet Scheduling., , , , , , , , , and . CoRR, (2016)dRMT: Disaggregated Programmable Switching., , , , , , , , , and 2 other author(s). SIGCOMM, page 1-14. ACM, (2017)Scaling internet routers using optics., , , , , , and . SIGCOMM, page 189-200. ACM, (2003)