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MAIA: a framework for networks on chip generation and verification.

, , , , and . ASP-DAC, page 49-52. ACM Press, (2005)

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A Fast, Accurate, and Comprehensive PPA Estimation of Convolutional Hardware Accelerators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (12): 5171-5184 (2022)FLEA - FIT-Aware Heuristic for Application Allocation in Many-Cores based on Q-Learning., , and . SBESC, page 1-6. IEEE, (2023)Reducing test time with processor reuse in network-on-chip based systems., , , and . SBCCI, page 111-116. ACM, (2004)Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation., , , , , and . SBCCI, page 196-201. ACM, (2005)Design-Time Analysis of Real-Time Traffic for Networks-on-Chip using Constraint Models., , , and . SBCCI, page 1-6. IEEE, (2022)A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators., , , and . LASCAS, page 1-4. IEEE, (2021)Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip., , , , , , , , and . ISCAS, page 1500-1503. IEEE, (2011)Runtime QoS Support for MPSoC: a Processor Centric Approach., , and . SBCCI, page 43:1-43:7. ACM, (2014)An integrated method for implementing online fault detection in NoC-based MPSoCs., , , , and . ISCAS, page 1562-1565. IEEE, (2015)A method for NoC-based MPSoC energy consumption estimation., , , , and . ICECS, page 427-430. IEEE, (2014)