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A Software-Hardware Co-Optimized Toolkit for Deep Reinforcement Learning on Heterogeneous Platforms., , , , and . CoRR, (2023)FPGA PLB Architecture Evaluation and Area Optimization Techniques Using Boolean Satisfiability., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (7): 1196-1210 (2007)A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs., , , , , , and . FPGA, page 167-176. ACM, (2010)Automated Extraction of Physical Hierarchies for Performance Improvement on Programmable Logic Devices., , and . VLSI, page 28-33. CSREA Press, (2003)OpenCL., and . FPGAs for Software Programmers, Springer, (2016)Post-Placement BDD-Based Decomposition for FPGAs., , and . FPL, page 31-38. IEEE, (2005)Fractal video compression in OpenCL: An evaluation of CPUs, GPUs, and FPGAs as acceleration platforms., and . ASP-DAC, page 297-304. IEEE, (2013)Integrated retiming and placement for field programmable gate arrays., and . FPGA, page 67-76. ACM, (2002)An Area-Efficient Timing Closure Technique for FPGAs Using Shannon's Expansion., and . VLSI, page 41-50. CSREA Press, (2003)Harnessing the power of FPGAs using altera's OpenCL compiler., , and . FPGA, page 5-6. ACM, (2013)