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Disambiguation of "Temporiti, Enrico"

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A 64 Gb/s Low-Power Transceiver for Short-Reach PAM-4 Electrical Links in 28-nm FDSOI CMOS.

, , , , , , , , , and . IEEE J. Solid State Circuits, 54 (1): 6-17 (2019)

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Enrico Fest

Enrico Mönke

Enrico Metzler

Enrico Thormann

Enrico Schaarschmidt

 

Other publications of authors with the same name

A 5th order gm-C low-pass filter with ±3% cut-off frequency accuracy and 220MHz to 3.3GHz tuning-range in 28nm LP CMOS., , , , , and . ESSCIRC, page 351-354. IEEE, (2014)A 3D-integrated 25Gbps silicon photonics receiver in PIC25G and 65nm CMOS technologies., , , , , and . ESSCIRC, page 131-134. IEEE, (2014)FDMA-PON and NG-PON2: Performance and cost comparison., , , , , , and . ICTON, page 1-4. IEEE, (2014)23.4 A 56Gb/s 300mW silicon-photonics transmitter in 3D-integrated PIC25G and 55nm BiCMOS technologies., , , , , and . ISSCC, page 404-405. IEEE, (2016)A 25Gb/s 3D-integrated silicon photonics receiver in 65nm CMOS and PIC25G for 100GbE optical links., , , , , , and . ISCAS, page 2334-2337. IEEE, (2016)A 26-Gb/s 3-D-Integrated Silicon Photonic Receiver in BiCMOS-55 nm and PIC25G With - 15.2-dBm OMA Sensitivity., , , , , and . ESSCIRC, page 187-190. IEEE, (2019)A 3GHz Fractional-N All-Digital PLL with Precise Time-to-Digital Converter Calibration and Mismatch Correction., , , and . ISSCC, page 344-345. IEEE, (2008)Power consumption estimation for the silicon-photonics reflective ONU conceived within the FABULOUS European project., , , , , , , and . ICTON, page 1-4. IEEE, (2015)A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 46 (3): 551-561 (2011)A 700-kHz bandwidth ΣΔ fractional synthesizer with spurs compensation and linearization techniques for WCDMA applications., , , , and . IEEE J. Solid State Circuits, 39 (9): 1446-1454 (2004)