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Embedded architectural simulation within behavioral synthesis environment.

, , и . ASP-DAC, стр. 227-232. IEEE, (1997)

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Wassim Amine

Abu Bakr Ahmed Amine Nassr

Amine Ahriche

Amine Chaieb

Amine Bouabdallah

 

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AMICAL: Architectural Synthesis based on VHDL., , и . Synthesis for Control Dominated Circuits, том A-22 из IFIP Transactions, стр. 219-234. North-Holland, (1992)Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration., , , , и . ASP-DAC, стр. 969-972. ACM Press, (2005)Interactive System-level Partitioning with PARTIF., , и . EDAC-ETC-EUROASIC, стр. 464-468. IEEE Computer Society, (1994)A Loop-Based Scheduling Algorithm for Hardware Description Languages., , и . Parallel Process. Lett., (1994)System-on-a-Chip Cosimulation and Compilation., , , , и . IEEE Des. Test Comput., 14 (2): 16-25 (1997)Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip., , , , и . Des. Autom. Embed. Syst., 11 (2-3): 167-191 (2007)Modeling and rapid prototyping of avionics using STATEMATE., , , , и . RSP, стр. 62-67. IEEE Computer Society, (1995)Multi-Language System Design., и . DATE, стр. 696-. IEEE Computer Society / ACM, (1999)Efficient Integration of Behavioral Synthesis with Existing Design Flows., , , и . ISSS, стр. 85-90. ACM / IEEE Computer Society, (2000)Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals., и . IEEE International Workshop on Rapid System Prototyping, стр. 60-65. IEEE Computer Society, (2000)