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Disambiguation of "Rhod, Eduardo Luis"

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Binary translation process to optimize nanowire arrays usage.

, , and . ISCAS, page 396-399. IEEE, (2008)

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Luis Eduardo Mora

Luis Eduardo Gama

Luis Eduardo Cordero Arias

Luis Eduardo Ortiz Tánchez

Luis Eduardo Hoyos Jaramillo

 

Other publications of authors with the same name

A Low Cost Low Power Quaternary LUT Cell for Fault Tolerant Applications in Future Technologies., and . ISVLSI, page 292-297. IEEE Computer Society, (2009)Using Memory to Cope with Simultaneous Transient Faults., , and . LATW, page 151-156. IEEE, (2006)A low-SER efficient core processor architecture for future technologies., , and . DATE, page 1448-1453. EDA Consortium, San Jose, CA, USA, (2007)Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs., , , , and . J. Electron. Test., 24 (1-3): 45-56 (2008)Binary translation process to optimize nanowire arrays usage., , and . ISCAS, page 396-399. IEEE, (2008)A new structure of UHF RFID tag antenna mountable on metallic surface using double slits., , , and . LATINCOM, page 1-3. IEEE, (2017)An efficient test and characterization approach for nanowire-based architectures., and . SBCCI, page 34-39. ACM, (2008)Merging a DSP-Oriented Signal Integrity Technique and SW-Based Fault Handling Mechanisms to Ensure Reliable DSP Systems., , , , and . J. Electron. Test., 20 (4): 397-411 (2004)A new RC design for mixed-grain based dynamically reconfigurable architectures., , and . ICECS, page 984-987. IEEE, (2009)A New Soft-Error Resilient Voltage-Mode Quaternary Latch., , and . DFT, page 200-208. IEEE Computer Society, (2010)