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Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (7): 935-945 (1993)

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The Performance of the Concurrent Fault Simulation Algorithms in MOZART., , and . DAC, page 692-697. ACM, (1988)Algorithms for Approximate FSM Traversal., , , , and . DAC, page 25-30. ACM Press, (1993)Minimum Length Synchronizing Sequences of Finite State Machine., , and . DAC, page 463-468. ACM Press, (1993)Fair Simulation Minimization., , and . CAV, volume 2404 of Lecture Notes in Computer Science, page 610-624. Springer, (2002)The Charme of Abstract Entities.. CHARME, volume 2860 of Lecture Notes in Computer Science, page 2. Springer, (2003)VIS: A System for Verification and Synthesis., , , , , , , , , and 6 other author(s). CAV, volume 1102 of Lecture Notes in Computer Science, page 428-432. Springer, (1996)A Performance Study of BDD-Based Model Checking., , , , , , , and . FMCAD, volume 1522 of Lecture Notes in Computer Science, page 255-289. Springer, (1998)Good-for-MDPs Automata., , , , , and . CoRR, (2019)Logic synthesis and verification algorithms., and . Springer, (2006)An ADD-based algorithm for shortest path back-tracing of large graphs., , , , and . Great Lakes Symposium on VLSI, page 248-251. IEEE, (1994)