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Disambiguation of "Su, Stephen Y. H."

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Reliability Analysis of N-Modular Redundancy Systems with Intermittent and Permanent Faults.

, and . IEEE Trans. Computers, 28 (7): 514-520 (1979)

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Chun-y ng H

Y Winter

Y Mardiyati

Y LeConte

Rainer Y

 

Other publications of authors with the same name

Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy., , and . IEEE Trans. Computers, 38 (4): 547-554 (1989)Computer-Aided Logic Design of Two-Level MOS Combinational Networks with Statistical Results., and . IEEE Trans. Computers, 27 (10): 911-923 (1978)An interactive design automation system.. DAC, page 253-261. ACM, (1973)Testing functional faults in VLSI., and . DAC, page 384-392. ACM/IEEE, (1982)An overview of fault-tolerant digital system architecture., and . AFIPS National Computer Conference, volume 46 of AFIPS Conference Proceedings, page 19-26. AFIPS Press, (1977)A Simplified Algorithm for Testing Microprocessors., , and . ITC, page 668-675. IEEE Computer Society, (1983)Functional Test Generation of Digital LSI/VLSI Systems Using Machine Symbolic Execution Technique., and . ITC, page 660-668. IEEE Computer Society, (1984)VLSI functional testing using critical path traces at hardware description language level., and . Fehlertolerierende Rechensysteme, volume 84 of Informatik-Fachberichte, page 364-379. Springer, (1984)A digital system modeling philosophy and design language., and . DAC, page 1-22. ACM, (1971)Detecting bridging and stuck-at faults at input and output pins of standard digital components., and . DAC, page 494-505. ACM/IEEE, (1980)