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Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications., , , , , , and . VLSI Circuits, page 85-86. IEEE, (2018)A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS., , , , and . VLSIC, page 270-. IEEE, (2015)A 467nW CMOS visual motion sensor with temporal averaging and pixel aggregation., , , , , , and . ISSCC, page 480-481. IEEE, (2013)A Charge-Injection-Based Active-Decoupling Technique for Inductive-Supply-Noise Suppression., and . ISSCC, page 416-417. IEEE, (2008)Automatic Generation of Behavioral Models from Switch-Level Descriptions., , , , and . DAC, page 179-184. ACM Press, (1989)In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter., , , , , , and . ISSCC, page 188-189. IEEE, (2010)Circuit optimization techniques to mitigate the effects of soft errors in combinational logic., , , and . ACM Trans. Design Autom. Electr. Syst., 15 (1): 5:1-5:27 (2009)A Variation-Tolerant Sub-200 mV 6-T Subthreshold SRAM., , , and . IEEE J. Solid State Circuits, 43 (10): 2338-2348 (2008)Leakage Current: Moore's Law Meets Static Power., , , , , , , , and . Computer, 36 (12): 68-75 (2003)Postroute gate sizing for crosstalk noise reduction., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (12): 1670-1677 (2004)