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Automatic design of RC polyphase filters with small element value spread using genetic algorithm.

, , , , , and . ISPACS, page 303-306. IEEE, (2015)

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Automatic design of RC polyphase filters with small element value spread using genetic algorithm., , , , , and . ISPACS, page 303-306. IEEE, (2015)Inference of Suitable for Required Specification Analog Circuit Topology using Deep Learning., , , and . ISPACS, page 131-134. IEEE, (2018)New architecture for envelope-tracking power amplifier for base station., , , , , , , and . APCCAS, page 296-299. IEEE, (2008)Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control., , , , , and . ISPACS, page 758-763. IEEE, (2017)Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm., , , , , and . ASICON, page 1-4. IEEE, (2015)Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization., , , , , and . ASICON, page 1-4. IEEE, (2015)SAR ADC Algorithm with Redundancy and Digital Error Correction., , , , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (2): 415-423 (2010)Multi-bit Sigma-Delta TDC Architecture with Improved Linearity., , , , , , , , , and 3 other author(s). J. Electron. Test., 29 (6): 879-892 (2013)Single inductor dual output DC-DC converter design with exclusive control., , , , , , , , , and 6 other author(s). APCCAS, page 436-439. IEEE, (2012)DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control., , , , , , , , , and 4 other author(s). APCCAS, page 65-68. IEEE, (2012)