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Design of high-speed clock recovery circuit for burst-mode applications., and . ISCAS, page 177-180. IEEE, (2011)Design of high-performance transform and quantization circuit for unified video CODEC., and . APCCAS, page 1450-1453. IEEE, (2008)High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC., , , and . SoCC, page 419-422. IEEE, (2009)Efficient Pedestrian Detection Using Multi-Scale HOG Features with Low Computational Complexity., and . IEICE Trans. Inf. Syst., 97-D (2): 366-369 (2014)Design of AdaBoost classifier circuit using Haar-like features for automobile applications., , , and . ISOCC, page 262-265. IEEE, (2011)COSMOS: A Compiled Simulator for MOS Circuits., , , , and . DAC, page 9-16. IEEE Computer Society Press / ACM, (1987)Design of Transform and Quantization Circuit for Multi-Standard Integrated Video Decoder., and . SiPS, page 181-186. IEEE, (2007)High-performance inverse transform circuit based on butterfly architecture for H.264 high profile decoder., and . APCCAS, page 394-397. IEEE, (2010)Trade-off between accuracy and speed for pedestrian detection using HOG feature., and . ICCE-Berlin, page 207-209. IEEE, (2013)Test Pattern Generation for Sequential MOS Circuits by Symbolic Fault Simulation., and . DAC, page 418-423. ACM Press, (1989)