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3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks., , , и . 3D Integration for NoC-based SoC Architectures, Springer, (2011)Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips., , , , , , , и . VLSI-SoC, стр. 158-163. IEEE, (2006)Temperature-aware processor frequency assignment for MPSoCs using convex optimization., , , , , и . CODES+ISSS, стр. 111-116. ACM, (2007)SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips., , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (12): 1987-2000 (2010)An Application-Specific Design Methodology for On-Chip Crossbar Generation., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (7): 1283-1296 (2007)Timing-Error-Tolerant Network-on-Chip Design Methodology., , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (7): 1297-1310 (2007)Computing Accurate Performance Bounds for Best Effort Networks-on-Chip., , , , , и . IEEE Trans. Computers, 62 (3): 452-467 (2013)Towards 3D human pose construction using wifi., , , , , , , , , и . MobiCom, стр. 23:1-23:14. ACM, (2020)×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip., , , и . DATE, стр. 884-889. IEEE Computer Society, (2004)Harnessing the Ambient Radio Frequency Noise for Wearable Device Pairing., , , и . CCS, стр. 1135-1148. ACM, (2020)