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Disambiguation of "Pena-Perez, Aldo"

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Compact implementation of a three stages feedforward operational transconductance amplifier with Miller compensation.

, , , , and . ECCTD, page 1-4. IEEE, (2013)

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Rafael Peña Pérez

Susanne Aldoais

Jorge Alejandro Peña Sebald

Effektivität und Angemessenheit: Messung interkultureller Kompetenz im Assessment Center. Uni Jena, (2008)

Aldo Cipriano

Aldo Pratelli

 

Other publications of authors with the same name

Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (5): 969-978 (2012)27.5 A pixel-pitch-matched ultrasound receiver for 3D photoacoustic imaging with integrated delta-sigma beamformer in 28nm UTBB FDSOI., , , , , , and . ISSCC, page 456-457. IEEE, (2017)Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics., , and . ISCAS, page 2422-2425. IEEE, (2010)Performance enhanced op-amp for 65nm CMOS technologies and below., and . ISCAS, page 201-204. IEEE, (2012)Continuos Time ΣΔ modulator with efficient gain compensated integrators., , and . Microelectron. J., (2016)A 88-dB DR, 84-dB SNDR Very Low-Power Single Op-Amp Third-Order Σ Δ Modulator., , and . IEEE J. Solid State Circuits, 47 (9): 2107-2118 (2012)Read-Out Architecture of CRYO System-on-Chip ASIC for Noble Liquid TPC Detectors., , , , , , , , , and 4 other author(s). MWSCAS, page 611-614. IEEE, (2020)A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order ΔΣ modulator consuming 140μW., , and . ISSCC, page 478-480. IEEE, (2011)Third-order ΣΔ modulator with 61-dB SNR and 6-MHz bandwidth consuming 6 mW., , , and . ESSCIRC, page 218-221. IEEE, (2008)Use of time variant digital sigma-delta for fractional frequency synthesizers., , and . ISCAS, page 169-172. IEEE, (2011)