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Disambiguation of "Lian, Yong"

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An ECG-on-Chip for Wearable Cardiac Monitoring Devices.

, , , , and . CoRR, (2014)

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Puangrat Yongvanit

Li Yong

Karn Yongsiriwit

Lian Liu

Xianhua Lian

 

Other publications of authors with the same name

A 0.6-V 82-dB 28.6- μ W Continuous-Time Audio Delta-Sigma Modulator., , , and . IEEE J. Solid State Circuits, 46 (10): 2326-2335 (2011)3-5 GHz 4-Channel UWB Beamforming Transmitter With 1° Scanning Resolution Through Calibrated Vernier Delay Line in 0.13-µm CMOS., , and . IEEE J. Solid State Circuits, 47 (12): 3145-3159 (2012)A 2.89 µW Dry-Electrode Enabled Clockless Wireless ECG SoC for Wearable Applications., , , , , and . IEEE J. Solid State Circuits, 51 (10): 2287-2298 (2016)A 0.5-V 35-µW 85-dB DR Double-Sampled ΔΣ Modulator for Audio Applications., , and . IEEE J. Solid State Circuits, 47 (3): 722-735 (2012)A Low-Power Compact IEEE 802.15.6 Compatible Human Body Communication Transceiver With Digital Sigma-Delta IIR Mask Shaping., , , and . IEEE J. Solid State Circuits, 54 (2): 346-357 (2019)An improved frequency response masking approach for designing sharp FIR filters., , and . Signal Process., 81 (12): 2573-2581 (2001)An Integrated Data Preprocessing Framework Based on Apache Spark for Fault Diagnosis of Power Grid Equipment., , , , , , and . J. Signal Process. Syst., 86 (2-3): 221-236 (2017)Optimization Scheme to Minimize Reference Resistance Distribution of Spin-Transfer-Torque MRAM., , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (5): 1179-1182 (2014)Average-8T Differential-Sensing Subthreshold SRAM With Bit Interleaving and 1k Bits Per Bitline., and . IEEE Trans. Very Large Scale Integr. Syst., 22 (5): 971-982 (2014)A Low-Power Forward and Reverse Body Bias Generator in CMOS 40 nm., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (7): 1403-1407 (2018)