( en | de | ru )

 

Disambiguation of "Brayton, Robert K."

Author of the publication

copydeleteadd this publication to your clipboard
Using simulation and satisfiability to compute flexibilities in Boolean networks.

, , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (5): 743-755 (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Robert K Müller

Robert K Saam

Robert K Müller

Robert K Dudler

Robert K G Köhler

 

Other publications of authors with the same name

Exact Required Time Analysis via False Path Detection., and . DAC, page 220-225. ACM Press, (1997)Logic Synthesis for Programmable Gate Arrays., , , , and . DAC, page 620-625. IEEE Computer Society Press, (1990)Timing Analysis in Precharge/Unate Networks., and . DAC, page 124-129. IEEE Computer Society Press, (1990)Solving the State Assignment Problem for Signal Transition Graphs., , , and . DAC, page 568-572. IEEE Computer Society Press, (1992)Equivalence of Robust Delay-Fault and Single Stuck-Fault Test Generation., , and . DAC, page 173-176. IEEE Computer Society Press, (1992)An Improved Synthesis Algorithm for Multiplexor-Based PGA's., , and . DAC, page 380-386. IEEE Computer Society Press, (1992)Permissible Observability Relations in FSM Networks., and . DAC, page 677-683. ACM Press, (1994)A Fully Implicit Algorithm for Exact State Minimization., , , and . DAC, page 684-690. ACM Press, (1994)Two-Level Minimization of Multivalued Functions with Large Offsets., , , and . IEEE Trans. Computers, 42 (11): 1325-1342 (1993)Scalable don't-care-based logic optimization and resynthesis., , , and . FPGA, page 151-160. ACM, (2009)